Determine storage buffer alignment dynamically

app/src/main/cpp/skyline/common/address_space.h

@@ -113,10 +113,11 @@ namespace skyline {
 
         std::pair<span<u8>, size_t> LookupBlockLocked(VaType virt, std::function<void(span<u8>)> cpuAccessCallback = {}) {
             const auto &blockEntry{this->blockSegmentTable[virt]};
-            if (blockEntry.phys == nullptr)
-                return {span<u8>{}, 0};
-
             VaType segmentOffset{virt - blockEntry.virt};
+
+            if (blockEntry.extraInfo.sparseMapped || blockEntry.phys == nullptr)
+                return {span<u8>{static_cast<u8*>(nullptr), blockEntry.extent}, segmentOffset};
+
             span<u8> blockSpan{blockEntry.phys, blockEntry.extent};
             if (cpuAccessCallback)
                 cpuAccessCallback(blockSpan);

app/src/main/cpp/skyline/common/address_space.inc

@@ -238,16 +238,7 @@ namespace skyline {
         u8 *blockPhys{predecessor->phys + (virt - predecessor->virt)};
         VaType blockSize{std::min(successor->virt - virt, size)};
 
-
         while (size) {
-            // Return a zeroed out map to emulate sparse mappings
-            if (predecessor->extraInfo.sparseMapped) {
-                if (blockSize > SparseMapSize)
-                    throw exception("Size of the sparse map is too small to fit block of size: 0x{:X}", blockSize);
-
-                blockPhys = sparseMap;
-            }
-
             if (predecessor->phys) {
                 span cpuBlock{blockPhys, blockSize};
                 if (cpuAccessCallback)

app/src/main/cpp/skyline/gpu/interconnect/common/pipeline.inc

@@ -37,14 +37,12 @@ namespace skyline::gpu::interconnect {
             u64 address;
             u32 size;
         };
-        static constexpr size_t MinAlignment{0x40};
-
         auto ssbo{cbuf.Read<SsboDescriptor>(ctx.executor, desc.cbuf_offset)};
         if (ssbo.size == 0)
             return BufferBinding{ctx.gpu.megaBufferAllocator.Allocate(ctx.executor.cycle, PAGE_SIZE).buffer, 0, PAGE_SIZE};
 
-        size_t padding{ssbo.address & (MinAlignment - 1)};
+        size_t padding{ssbo.address & (ctx.gpu.traits.minimumStorageBufferAlignment - 1)};
-        cachedView.Update(ctx, ssbo.address - padding, util::AlignUp(ssbo.size + padding, MinAlignment));
+        cachedView.Update(ctx, ssbo.address - padding, util::AlignUp(ssbo.size + padding, ctx.gpu.traits.minimumStorageBufferAlignment));
 
         auto view{cachedView.view};
         ctx.executor.AttachBuffer(view);

app/src/main/cpp/skyline/gpu/trait_manager.cpp

@@ -210,6 +210,9 @@ namespace skyline::gpu {
         for (u32 i{}; i < memoryProps.memoryProperties.memoryTypeCount; i++)
             if ((memoryProps.memoryProperties.memoryTypes[i].propertyFlags & ReqMemFlags) == ReqMemFlags)
                 hostVisibleCoherentCachedMemoryType = i;
+
+
+        minimumStorageBufferAlignment = static_cast<u32>(deviceProperties2.get().properties.limits.minStorageBufferOffsetAlignment);
     }
 
     std::string TraitManager::Summary() {

app/src/main/cpp/skyline/gpu/trait_manager.h

@@ -51,6 +51,7 @@ namespace skyline::gpu {
         bool supportsNullDescriptor{}; //!< If the device supports the null descriptor feature in the 'VK_EXT_robustness2' Vulkan extension
         u32 subgroupSize{}; //!< Size of a subgroup on the host GPU
         u32 hostVisibleCoherentCachedMemoryType{std::numeric_limits<u32>::max()};
+        u32 minimumStorageBufferAlignment{}; //!< Minimum alignment for storage buffers passed to shaders
 
         std::bitset<7> bcnSupport{}; //!< Bitmask of BCn texture formats supported, it is ordered as BC1, BC2, BC3, BC4, BC5, BC6H and BC7
         bool supportsAdrenoDirectMemoryImport{};