diff --git a/app/src/main/cpp/skyline/gpu/interconnect/graphics_context.h b/app/src/main/cpp/skyline/gpu/interconnect/graphics_context.h
index ebdab4b7..7aaba6e6 100644
--- a/app/src/main/cpp/skyline/gpu/interconnect/graphics_context.h
+++ b/app/src/main/cpp/skyline/gpu/interconnect/graphics_context.h
@@ -531,5 +531,10 @@ namespace skyline::gpu::interconnect {
                 }
             }();
         }
+
+        void SetAlphaTestEnable(bool enable) {
+            if (enable)
+                Logger::Warn("Cannot enable alpha testing due to Vulkan constraints");
+        }
     };
 }
diff --git a/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.cpp b/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.cpp
index 725bbf45..c31ebdd6 100644
--- a/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.cpp
+++ b/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.cpp
@@ -183,6 +183,10 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
                     context.UpdateRenderTargetControl(renderTargetControl);
                 })
 
+                MAXWELL3D_CASE(alphaTestEnable, {
+                    context.SetAlphaTestEnable(alphaTestEnable);
+                })
+
                 MAXWELL3D_CASE(lineWidthSmooth, {
                     if (*registers.lineSmoothEnable)
                         context.SetLineWidth(lineWidthSmooth);
diff --git a/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.h b/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.h
index d5af0ee8..a172ce2c 100644
--- a/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.h
+++ b/app/src/main/cpp/skyline/soc/gm20b/engines/maxwell_3d.h
@@ -108,6 +108,7 @@ namespace skyline::soc::gm20b::engine::maxwell3d {
             Register<0x3EB, u32> rtSeparateFragData;
             Register<0x458, std::array<type::VertexAttribute, 0x20>> vertexAttributeState;
             Register<0x487, type::RenderTargetControl> renderTargetControl;
+            Register<0x4BB, u32> alphaTestEnable;
             Register<0x4C3, type::CompareOp> depthTestFunc;
             Register<0x4C4, float> alphaTestRef;
             Register<0x4C5, type::CompareOp> alphaTestFunc;