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https://github.com/rehlds/rehlds.git
synced 2024-12-27 23:25:45 +03:00
Added GAS syntax support
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asmodai
parent
312a03f9aa
commit
a1b80ad704
@ -470,11 +470,15 @@ qboolean SV_IsPlayerIndex(int index)
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return (index >= 1 && index <= g_psvs.maxclients);
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}
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qboolean __declspec(naked) SV_IsPlayerIndex_wrapped(int index)
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#if defined _MSC_VER || defined __INTEL_COMPILER
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__declspec(naked)
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#endif
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qboolean SV_IsPlayerIndex_wrapped(int index)
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{
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// Original SV_IsPlayerIndex in swds.dll doesn't modify ecx nor edx.
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// During the compilation of original swds.dll compiler was assuming that these registers wouldn't be modified during call to SV_IsPlayerIndex().
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// This is not true for code produced by msvc2013 (which uses ecx even in Release config). That's why we need a wrapper here that preserves ecx and edx before call to reversed SV_IsPlayerIndex().
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#if defined _MSC_VER || defined __INTEL_COMPILER
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__asm
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{
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mov eax, dword ptr[esp + 4];
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@ -487,6 +491,20 @@ qboolean __declspec(naked) SV_IsPlayerIndex_wrapped(int index)
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pop ecx;
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retn;
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}
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#else
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asm volatile (
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"pushl %%ecx\n\t"
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"pushl %%edx\n\t"
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"pushl %0\n\t"
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"call $SV_IsPlayerIndex\n\t"
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"addl %%esp, $4\n\t"
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"popl %%edx\n\t"
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"popl %%ecx\n\t"
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"retn"
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::
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"g" (index)
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);
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#endif
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}
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/* <a6717> ../engine/sv_main.c:514 */
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@ -5371,6 +5389,7 @@ void EXT_FUNC SV_WriteVoiceCodec_internal(sizebuf_t *pBuf)
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*/
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void __invokeValvesBuggedCreateBaseline(void* func, int player, int eindex, struct entity_state_s *baseline, struct edict_s *entity, int playermodelindex, vec_t* pmins, vec_t* pmaxs)
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{
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#if defined _MSC_VER || defined __INTEL_COMPILER
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__asm {
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mov ecx, func
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push 0
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@ -5387,6 +5406,35 @@ void __invokeValvesBuggedCreateBaseline(void* func, int player, int eindex, stru
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call ecx
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add esp, 0x2C
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}
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#else
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asm volatile (
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"movl %%ecx, %0\n\t"
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"pushl $0\n\t"
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"pushl $1\n\t"
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"pushl $0\n\t"
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"pushl $0\n\t"
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"pushl %1\n\t"
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"pushl %2\n\t"
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"pushl %3\n\t"
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"pushl %4\n\t"
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"pushl %5\n\t"
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"pushl %6\n\t"
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"pushl %7\n\t"
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"call *%%ecx\n\t"
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"addl %%esp, $0x2C"
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::
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"g" (func),
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"g" (pmaxs),
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"g" (pmins),
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"g" (playermodelindex),
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"g" (entity),
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"g" (baseline),
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"g" (eindex),
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"g" (player)
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:
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"ecx"
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);
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#endif
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}
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/* <a9cf9> ../engine/sv_main.c:6866 */
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@ -218,15 +218,25 @@ void Sys_SetupFPUOptions()
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{
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static uint8 fpuOpts[32];
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#if defined _MSC_VER || defined __INTEL_COMPILER
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__asm { fnstenv byte ptr fpuOpts }
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fpuOpts[0] |= 0x3Fu;
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__asm { fldenv byte ptr fpuOpts }
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#else
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asm volatile ("fnstenv %0" : "=m" (fpuOpts));
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fpuOpts[0] |= 0x3Fu;
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asm volatile ("fldenv %0" : "=m" (fpuOpts));
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#endif
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}
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NOINLINE void Sys_InitFPUControlWords()
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{
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int fpucw = 0;
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#if defined _MSC_VER || defined __INTEL_COMPILER
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__asm { fnstcw fpucw }
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#else
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asm volatile ("fnstcw %0" : "=m" (fpucw));
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#endif
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g_FPUCW_Mask_Prec_64Bit = (fpucw & 0xF0FF) | 0x300;
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g_FPUCW_Mask_Prec_64Bit_2 = (fpucw & 0xF0FF) | 0x300;
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@ -283,13 +293,27 @@ void __cdecl Sys_InitHardwareTimer()
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int g_SavedFPUCW1 = 0;
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NOINLINE void Sys_FPUCW_Push_Prec64() {
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uint16 tmp = g_FPUCW_Mask_Prec_64Bit;
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__asm { fnstcw g_SavedFPUCW1 }
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__asm { fldcw tmp }
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#if defined _MSC_VER || defined __INTEL_COMPILER
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__asm {
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fnstcw g_SavedFPUCW1;
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fldcw tmp;
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}
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#else
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asm volatile ("fnstcw %0\n\t"
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"fldcw %1" :
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"=m" (g_SavedFPUCW1),
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"=m" (tmp));
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#endif
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}
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NOINLINE void Sys_FPUCW_Pop_Prec64() {
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uint16 tmp = g_SavedFPUCW1;
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#if defined _MSC_VER || defined __INTEL_COMPILER
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__asm { fldcw tmp }
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#else
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asm volatile ("fldcw %0" : "=m" (tmp));
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#endif
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}
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#endif // _WIN32
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@ -246,6 +246,7 @@ inline void CCycleCount::Init(float initTimeMsec)
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inline void CCycleCount::Sample()
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{
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unsigned long* pSample = (unsigned long *)&m_Int64;
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#if defined _MSC_VER || defined __INTEL_COMPILER
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__asm
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{
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// force the cpu to synchronize the instruction queue
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@ -253,11 +254,23 @@ inline void CCycleCount::Sample()
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//cpuid
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//cpuid
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//cpuid
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mov ecx, pSample
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rdtsc
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mov[ecx], eax
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mov[ecx + 4], edx
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mov ecx, pSample;
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rdtsc;
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mov [ecx], eax;
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mov [ecx + 4], edx;
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}
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#else
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asm volatile (
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"movl %%ecx, %0\n\t"
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"rdtsc\n\t"
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"mov (%%ecx), %%eax\n\t"
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"mov $4(%%ecx), %%edx"
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::
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"r" (pSample)
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:
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"eax", "ecx", "edx"
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);
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#endif
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}
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@ -103,7 +103,11 @@ typedef void * HINSTANCE;
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#endif
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// Used to step into the debugger
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#if defined _MSC_VER || defined __INTEL_COMPILER
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#define DebuggerBreak() __asm { int 3 }
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#else
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#define DebuggerBreak() asm volatile ("int 3")
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#endif
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// C functions for external declarations that call the appropriate C++ methods
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#ifndef EXPORT
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@ -263,21 +267,39 @@ inline T DWordSwapC(T dw)
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template <typename T>
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inline T WordSwapAsm(T w)
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{
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#if defined _MSC_VER || defined __INTEL_COMPILER
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__asm
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{
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mov ax, w
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xchg al, ah
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mov ax, w;
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xchg al, ah;
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}
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#else
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asm volatile (
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"movw %%ax, %0\n\t"
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"xchgb %%al, %%ah\n\t"
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::
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"m" (w)
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);
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#endif
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}
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template <typename T>
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inline T DWordSwapAsm(T dw)
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{
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#if defined _MSC_VER || defined __INTEL_COMPILER
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__asm
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{
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mov eax, dw
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bswap eax
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mov eax, dw;
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bswap eax;
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}
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#else
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asm volatile (
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"movl %%eax, %0\n\t"
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"bswapl %%eax\n\t"
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::
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"m" (dw)
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);
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#endif
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}
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#pragma warning(pop)
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@ -5,9 +5,11 @@ import org.gradle.nativeplatform.NativeExecutableBinarySpec
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import org.gradle.nativeplatform.SharedLibraryBinarySpec
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import org.gradle.nativeplatform.StaticLibraryBinarySpec
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import org.gradle.nativeplatform.toolchain.VisualCpp
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import org.gradle.nativeplatform.toolchain.Clang
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apply from: 'shared_msvc.gradle'
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apply from: 'shared_icc.gradle'
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apply from: 'shared_llvm.gradle'
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rootProject.ext.createToolchainConfig = { NativeBinarySpec bin ->
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BinaryKind binaryKind
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@ -27,6 +29,8 @@ rootProject.ext.createToolchainConfig = { NativeBinarySpec bin ->
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return rootProject.createMsvcConfig(releaseBuild, binaryKind)
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} else if (bin.toolChain instanceof Icc) {
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return rootProject.createIccConfig(releaseBuild, binaryKind)
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} else if (bin.toolChain instanceof Clang) {
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return rootProject.createClangConfig(releaseBuild, binaryKind)
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} else {
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throw new RuntimeException("Unknown native toolchain: ${bin.toolChain.class.name}")
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}
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